RAJA
RAJA provides a collection of platform portability abstractions for C++ HPC applications.
arch.hpp
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1 
11 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
12 // Copyright (c) Lawrence Livermore National Security, LLC and other
13 // RAJA Project Developers. See top-level LICENSE and COPYRIGHT
14 // files for dates and other details. No copyright assignment is required
15 // to contribute to RAJA.
16 //
17 // SPDX-License-Identifier: (BSD-3-Clause)
18 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
19 
20 #ifndef RAJA_policy_tensor_arch_HPP
21 #define RAJA_policy_tensor_arch_HPP
22 
23 #include "RAJA/config.hpp"
24 
25 namespace RAJA
26 {
27 
28 namespace internal
29 {
30 
31 namespace expt
32 {
33 
34 
38 template<typename REGISTER_POLICY, typename T>
40 /*
41  * using element_type = T;
42  * using register_policy = REGISTER_POLICY;
43  * static constexpr camp::idx s_num_bits = X;
44  * static constexpr camp::idx s_num_elem = Y;
45  *
46  */
47 } // namespace expt
48 } // namespace internal
49 
50 //
52 //
53 // SIMD register types and policies
54 //
56 //
57 namespace expt
58 {
59 
60 #ifdef __AVX512F__
61 struct avx512_register
62 {};
63 
64 #ifndef RAJA_TENSOR_REGISTER_TYPE
65 #define RAJA_TENSOR_REGISTER_TYPE RAJA::expt::avx512_register
66 #endif
67 #endif
68 
69 
70 #ifdef __AVX2__
71 struct avx2_register
72 {};
73 
74 #ifndef RAJA_TENSOR_REGISTER_TYPE
75 #define RAJA_TENSOR_REGISTER_TYPE RAJA::expt::avx2_register
76 #endif
77 #endif
78 
79 
80 #ifdef __AVX__
81 struct avx_register
82 {};
83 
84 #ifndef RAJA_TENSOR_REGISTER_TYPE
85 #define RAJA_TENSOR_REGISTER_TYPE RAJA::expt::avx_register
86 #endif
87 #endif
88 
89 
90 #ifdef RAJA_ENABLE_CUDA
91 
95 struct cuda_warp_register
96 {};
97 
98 #endif
99 
100 
101 #ifdef RAJA_ENABLE_HIP
102 
107 struct hip_wave_register
108 {};
109 
110 #endif
111 
112 // The scalar register is always supported (doesn't require any SIMD/SIMT)
114 {};
115 
116 #ifndef RAJA_TENSOR_REGISTER_TYPE
117 #define RAJA_TENSOR_REGISTER_TYPE RAJA::expt::scalar_register
118 
119 #endif
120 
121 
122 // This sets the default SIMD register that will be used
124 
125 
126 } // namespace expt
127 } // namespace RAJA
128 
129 //
130 // Now include all of the traits files
131 //
132 
133 #ifdef __AVX512F__
135 #endif
136 
137 
138 #ifdef __AVX2__
140 #endif
141 
142 #ifdef __AVX__
144 #endif
145 
146 
147 #ifdef RAJA_CUDA_ACTIVE
149 #endif
150 
151 #ifdef RAJA_HIP_ACTIVE
153 #endif
154 
156 
157 
158 #endif
#define RAJA_TENSOR_REGISTER_TYPE
Definition: arch.hpp:117
Header file containing SIMD abstractions for AVX2.
Header file containing SIMD abstractions for AVX512.
Header file containing SIMD abstractions for AVX.
Header file containing RAJA simd policy definitions.
Header file containing RAJA simd policy definitions.
RAJA_TENSOR_REGISTER_TYPE default_register
Definition: arch.hpp:123
Definition: AlignedRangeIndexSetBuilders.cpp:35
Header file containing RAJA simd policy definitions.
Definition: arch.hpp:114