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RAJA
RAJA provides a collection of platform portability abstractions for C++ HPC applications.
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RAJA header file defining SIMD/SIMT register operations. More...
Go to the source code of this file.
Namespaces | |
| RAJA | |
| RAJA::internal | |
| RAJA::internal::expt | |
Enumerations | |
| enum | RAJA::internal::expt::TensorTileSize { RAJA::internal::expt::TENSOR_PARTIAL , RAJA::internal::expt::TENSOR_FULL , RAJA::internal::expt::TENSOR_MULTIPLE } |
Functions | |
| template<typename REF_TYPE , typename TILE_TYPE > | |
| RAJA_INLINE constexpr RAJA_HOST_DEVICE auto | RAJA::internal::expt::merge_ref_tile (REF_TYPE const &ref, TILE_TYPE const &tile) -> typename MergeRefTile< REF_TYPE, TILE_TYPE, camp::make_idx_seq_t< TILE_TYPE::s_num_dims >>::merge_type |
| template<typename REF_TYPE , typename TILE_TYPE > | |
| RAJA_INLINE constexpr RAJA_HOST_DEVICE auto | RAJA::internal::expt::shift_tile_origin (REF_TYPE const &ref, TILE_TYPE const &tile_origin) -> typename MergeRefTile< REF_TYPE, TILE_TYPE, camp::make_idx_seq_t< TILE_TYPE::s_num_dims >>::shift_type |
| template<typename INDEX_TYPE , TensorTileSize RTENSOR_SIZE, camp::idx_t NUM_DIMS> | |
| RAJA_INLINE constexpr RAJA_HOST_DEVICE TensorTile< INDEX_TYPE, TENSOR_FULL, NUM_DIMS > & | RAJA::internal::expt::make_tensor_tile_full (TensorTile< INDEX_TYPE, RTENSOR_SIZE, NUM_DIMS > &tile) |
| template<typename INDEX_TYPE , TensorTileSize RTENSOR_SIZE, camp::idx_t NUM_DIMS> | |
| RAJA_INLINE constexpr RAJA_HOST_DEVICE TensorTile< INDEX_TYPE, TENSOR_PARTIAL, NUM_DIMS > & | RAJA::internal::expt::make_tensor_tile_partial (TensorTile< INDEX_TYPE, RTENSOR_SIZE, NUM_DIMS > &tile) |
| template<typename INDEX_TYPE , TensorTileSize RTENSOR_SIZE, typename TBEGIN , typename TSIZE > | |
| RAJA_INLINE constexpr RAJA_HOST_DEVICE StaticTensorTile< INDEX_TYPE, TENSOR_FULL, TBEGIN, TSIZE > & | RAJA::internal::expt::make_tensor_tile_full (StaticTensorTile< INDEX_TYPE, RTENSOR_SIZE, TBEGIN, TSIZE > &tile) |
| template<typename INDEX_TYPE , TensorTileSize RTENSOR_SIZE, typename TBEGIN , typename TSIZE > | |
| RAJA_INLINE constexpr RAJA_HOST_DEVICE StaticTensorTile< INDEX_TYPE, TENSOR_PARTIAL, TBEGIN, TSIZE > & | RAJA::internal::expt::make_tensor_tile_partial (StaticTensorTile< INDEX_TYPE, RTENSOR_SIZE, TBEGIN, TSIZE > &tile) |
RAJA header file defining SIMD/SIMT register operations.