TensorDivide.hpp File Reference

RAJA header file defining SIMD/SIMT register operations. More...

#include "RAJA/config.hpp"
#include "RAJA/util/macros.hpp"
#include "RAJA/pattern/tensor/internal/ET/ExpressionTemplateBase.hpp"

Go to the source code of this file.

Classes
struct	RAJA::internal::expt::ET::DivideOperator< LEFT_OPERAND_TYPE, RIGHT_OPERAND_TYPE, typename std::enable_if< LEFT_OPERAND_TYPE::s_num_dims==0 &&RIGHT_OPERAND_TYPE::s_num_dims==1 >::type >
struct	RAJA::internal::expt::ET::DivideOperator< LEFT_OPERAND_TYPE, RIGHT_OPERAND_TYPE, typename std::enable_if< LEFT_OPERAND_TYPE::s_num_dims==1 &&RIGHT_OPERAND_TYPE::s_num_dims==0 >::type >
struct	RAJA::internal::expt::ET::DivideOperator< LEFT_OPERAND_TYPE, RIGHT_OPERAND_TYPE, typename std::enable_if< LEFT_OPERAND_TYPE::s_num_dims==1 &&RIGHT_OPERAND_TYPE::s_num_dims==1 >::type >
struct	RAJA::internal::expt::ET::DivideOperator< LEFT_OPERAND_TYPE, RIGHT_OPERAND_TYPE, typename std::enable_if< LEFT_OPERAND_TYPE::s_num_dims==0 &&RIGHT_OPERAND_TYPE::s_num_dims==2 >::type >
struct	RAJA::internal::expt::ET::DivideOperator< LEFT_OPERAND_TYPE, RIGHT_OPERAND_TYPE, typename std::enable_if< LEFT_OPERAND_TYPE::s_num_dims==2 &&RIGHT_OPERAND_TYPE::s_num_dims==0 >::type >
struct	RAJA::internal::expt::ET::DivideOperator< LEFT_OPERAND_TYPE, RIGHT_OPERAND_TYPE, typename std::enable_if< LEFT_OPERAND_TYPE::s_num_dims==2 &&RIGHT_OPERAND_TYPE::s_num_dims==2 >::type >
class	RAJA::internal::expt::ET::TensorDivide< LEFT_OPERAND_TYPE, RIGHT_OPERAND_TYPE >

Namespaces
	RAJA
	RAJA::internal
	RAJA::internal::expt
	RAJA::internal::expt::ET

Functions
template<typename LHS , typename RHS , typename std::enable_if< std::is_arithmetic< LHS >::value, bool >::type = true, typename std::enable_if< std::is_base_of< TensorExpressionConcreteBase, RHS >::value, bool >::type = true>
RAJA_INLINE RAJA_HOST_DEVICE auto	RAJA::internal::expt::ET::operator/ (LHS const &left_operand, RHS const &right_operand) -> TensorDivide< typename NormalizeOperandHelper< LHS >::return_type, RHS >

Detailed Description

RAJA header file defining SIMD/SIMT register operations.